Effects of Task Priority Assignment in Embedded Multi-Core Real-Time Systems




This article addresses task priority optimization in static scheduling in a multi-core processor for improving timing behavior of tasks of an embedded real-time system. We hereby consider both, preemptive and cooperative scheduling in multi-core processors. In addition, we list multi-core effects in timing regarding priority optimization and we propose an approach for assigning priorities for minimizing these effects.

Task priority optimization is an old topic in embedded real-time systems theory. It started with single core processors where several heuristics and solutions are devised by different authors and problem was adequate solved. Nowadays, with the use of multi-core processor technology it became again an even more challenging topic.

Although, multi-core processors lead to enhanced performance, reduced power consumption and efficient parallel processing of multiple tasks, it leads to software architecture design challenges and multi-core effects. In embedded real-time systems the shift from single-core to multi-core processors leads especially to communication based effects on timing such as inter-core communication delays and blocking times. In the following we describe what drives the motivation for optimization of task priorities and why an old topic becomes up-to date again.

[inlinead]

TO READ THE FULL STORY


Impressum :
Firmeninformationen entsprechend § 5 Telemediengesetz
IQPC Gesellschaft für Management Konferenzen mbH
Address: Friedrichstrasse 94, 10117 Berlin
Geschäftsführung: Silke Klaudat, Richard Worden, Michael R. Worden
Telefonnummer: 030 20913 -274
Fax: 49 (0) 30 20 913 240
Email Adresse: info@iqpc.de
Registereintragungen: Amtsgericht Charlottenburg HRB 76720
Umsatzsteuer- Indentifikationsnummer DE210454451