Riccardo Cagnacci

Senior Functional Safety Architect Intel

Graduated in Electronic Engineering at the University of Pisa (Italy), he has more than 10 years of experience in Functional Safety. He started working at Yogitech, developing safety concepts and solutions for customers’ products, with focus on the automotive market. He also has 4 years of experience as a FuSa Verification and Validation leader on railway products.

Currently working at Intel for FuSa automotive products as Senior Functional Safety Architect, he also led the ISO26262 2nd version part 9 and part 11 Italian WG and is part of ISO21488 - SOTIF sub-groups.

First Conference Day

Tuesday, March 26th, 2019

3:00 PM Exploitation of ASIL Decomposition for High Performance & High Safety Products

Scalable architectures and customers’ demands for high-compute and high-safety automotive solutions are challenging requirements to be fulfilled altogether. ISO26262 ASIL decomposition is an advanced technique that can be leveraged to solve the problem.

Post-conference Workshop Day

Thursday, March 28th, 2019

2:30 PM WORKSHOP 9: SAFETY ARCHITECTURES AND ASIL DECOMPOSITION

The workshop will describe the importance of defining safety architectures for high-performance SoCs targeting high-ASIL by leveraging from ASIL decomposition. Topics that will be included are:

  • ASIL decomposition as powerful technique
  • HW/SW architecture options
  • Dealing with legacy HW/SW and QM components

Check out the incredible speaker line-up to see who will be joining Riccardo.

Download The Latest Agenda